As the use and complexity of printed circuit boards has increased, so also has the need to test such packages increased in order to ensure proper operation subsequent to manufacture. Basically, two types of printed circuit board test techniques have been developed for this form of quality control, namely functional test techniques and so-called in-circuit test techniques.
In functional test techniques a known digital pattern is applied to the circuit input and a comparison is made of the circuit output with an expected output. The differences between the actual and expected outputs provides an indication of circuit operation. Unfortunately, this technique is only useful when it is desirable to know the overall operation of a circuit. Very often it is necessary to test individual circuit elements or groups of elements which have been assembled onto a printed circuit board apart from the overall circuit operation.
In in-circuit testing techniques, testing is performed on a circuit element or elements isolated from the remainder of the circuit. In-circuit testing techniques generally involve the application of a preselected digital pattern to the input of an individual circuit element, a so-called device under test (DUT), and the comparison of the DUT response to an expected response. Since the circuit element or elements under test typically are connected to other circuit elements on a printed circuit board, it may be required to overdrive any digital pattern or signal which is being applied by an "upstream" circuit element or logic device. Upstream logic devices are those devices whose outputs normally drive the inputs of the DUT. An overdrive signal is a signal which is superimposed at a selected location in a circuit.
In order to perform multiple simultaneous in-circuit tests on several individual circuit elements mounted on a single printed circuit board, test devices such as that disclosed in U.S. Pat. No. 4,588,945 were developed. In such devices a printed circuit board having pre-mounted circuit elements is in turn mounted or affixed to a so-called bed of nails. Each nail acts as an individual probe either providing a preselected signal to or receiving an output signal from a lead of a DUT. As described in that patent, a controller module applies multiple pregenerated signal patterns to multiple DUT leads through various driver modules. The DUT responses are received through sensor modules and compared to expected responses. In U.S. Pat. No. 4,588,945 methods and apparatus are disclosed which prevent damage to such DUTs or upstream devices during in-circuit testing.
Unfortunately, in-circuit testing techniques can be quite expensive to implement. When determining basic circuit information such as component presence, such sophisticated techniques are unwarranted. Simpler and less expensive techniques have been proposed to determine shorts and open connections on a printed circuit board, missing components and in certain circumstances bent connecting pins. U.S. Pat. No. 4,779,041 - Williamson, Jr. discloses one such system. In that patent, a current pulse is provided to one input of a semiconductor device under test. Application of the current pulse results in the forward biasing of the diode junction existing between the input and the ground lead. A test current is applied to another lead of the device, generating a voltage drop across the inherent resistance of the device. The application of the test current results in a decrease in the voltage at the input where the first current pulse was provided. Detection of this voltage decrease indicates not only the presence of a device, but also, that the input and output terminals, as well as the ground terminal of the device, are properly connected.
The problem with such purely electrical techniques is the potential for parallel electrical paths on the circuit board containing the devices being tested. Such parallel paths can result in induced currents in adjacent paths which can cause signal interference which in turn can lead to false indications of those conditions being tested. What is needed is a simple system for determining basic information about a device under test which avoids such parallel path problems.